S++‐GA: a high performance MAC protocol

Article type: Research Article

Authors: Meng, W. | Habib, I. | Saadawi, T.N.^;

Affiliations: GSUC and Department of Electrical Engineering, The City College, The City University of New York, New York, USA Tel: +1 212 650‐7248; E‐mail:[weimeng,eeiwh,eetns]@ee‐mail.engr.ccny.cuny.edu

Note: [] Corresponding author.

Abstract: A media access control (MAC) protocol supporting Slot Reuse for improving the performance of S++ networks, called group addressing simple double plus and denoted by S++‐GA, is presented. S++‐GA obtains higher performance than S++ via a four‐fold approach: (1) Dividing all the nodes in S++‐GA into multiple groups and assigning each group a group code. (2) Establishing a post‐destination group slot release rule that releases a busy slot after the busy slot departs from its destination group. (3) Introducing a modified transmission rule, named group transmission rule. (4) Modifying cyclic bandwidth‐allocation rule of S++. In contrast to S++ with Destination Release (DR) (S++‐DR) or with Erasure Nodes (EN) (S++‐EN), S++‐GA buffers only partial node‐address for slot release but not the whole node‐address or the whole slot. So, the system latency and access delay of S++‐GA are less than those of S++‐DR and S++‐EN.

Journal: Journal of High Speed Networks, vol. 6, no. 4, pp. 293-307, 1997