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Article type: Research Article
Authors: Midula, P.a | Shine, Linub | George, Neethaa; *
Affiliations: [a] Department of Electronics and Communication, RajivGandhi Institute of Technology, Kottayam, Kerala, India | [b] Department of Electronics and Communication, College of Engineering, Trivandrum, Kerala, India
Correspondence: [*] Corresponding author. Neetha George, Department of Electronics and Communication, Rajiv Gandhi Institute of Technology, Kottayam, Kerala, India. E-mail: [email protected].
Abstract: Fabrication of semiconductor wafers is a complex process and chances of defect wafers are high. Because of defective wafers the circuit patterns will not be created correctly and it is necessary to identify them. Manual identification of defects are time consuming and expensive. Deep learning methods are widely used for defect detection. In this paper we propose a simple Convolutional Neural Network (CNN) model for classification of nine defects in wafers. A custom CNN consisting of 9 layers is used for the classification of defects as Center, Donut, Edge-Loc, Edge-Ring, Loc, Random, Scratch, Near-full, and None. Performance of the model is evaluated using WM-811K dataset. Results shows that the model classifies the defects with high confidence score and an accuracy of 99.1% is achieved using this method. Further, the convolution operation in the CNN is realized using Coordinate Rotation Digital Computer (CORDIC) algorithm. The model is implemented in Field Programmable Gate Arrays (FPGA) and proved less complex method and consume less computational power than conventional methods.
Keywords: CNN, CORDIC, FPGA, wafer maps
DOI: 10.3233/JIFS-219430
Journal: Journal of Intelligent & Fuzzy Systems, vol. Pre-press, no. Pre-press, pp. 1-9, 2024
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