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Article type: Research Article
Authors: Sun, Song | Yan, Zijun | Zambreno, Joseph; *
Affiliations: Department of Electrical and Computer Engineering, Iowa State University, Ames, IA, USA
Correspondence: [*] Corresponding author: Dr. Joseph Zambreno, Department of Electrical and Computer Engineering, Iowa State University, Ames, IA 50011, USA. Email: [email protected].
Abstract: Since the concept was publicly introduced, power analysis attacks on cryptographic systems have become an increasingly studied topic in the computer security community. Research into countermeasures for these cryptographic systems has been intensified as well. Experiments have been conducted to show the potential effectiveness of power analysis attacks and preventative techniques on both software (e.g. smartcard, DSP) and hardware (e.g. ASIC, FPGA) processing elements. One key observation that motivates our work is that the majority of the research into power analysis on FPGA-based cryptographic systems has been a) theoretical in nature, b) evaluated through simulation, or c) experimented using custom hardware that does not closely mirror real-world systems. In this paper, we look to bridging this gap between theory and practice by detailing our experience in performing a Differential Power Analysis (DPA) attack on a commercial FPGA development board. We present an automated data acquisition and analysis design for an FPGA-based implementation of the Data Encryption Standard (DES). Based on our experience with this attack automation system, we provide an analysis of the features that exist in most commercial FPGA boards which can prevent an effective DPA attack.
DOI: 10.3233/ICA-2009-0309
Journal: Integrated Computer-Aided Engineering, vol. 16, no. 2, pp. 119-130, 2009
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