Power Estimation Under User-Specified Input Sequences and Programs

Article type: Research Article

Authors: Monteiro, José^a | Devadas, Srinivas^{b; *}

Affiliations: [a] INESC/IST - Sala 134, R. Alves Redol, 9, 1000 Lisboa, Portugal | [b] Center for Low Power Electronics, ECE Department, University of Arizona, Tucson, AZ 85721, USA

Correspondence: [*] Correspondence to: Prof. J.D. Devadas.

Abstract: We describe an approach to estimate the average power dissipation in sequential logic circuits under user-specified input sequences or programs. This approach will aid the design of programmable controllers or processors, by enabling the estimation of the power dissipated when the controller or processor is running specific application programs. Current approaches to sequential circuit power estimation are limited by the fact that the input sequences to the sequential circuit are assumed to be uncorrelated. In reality, the inputs come from other sequential circuits, or are application programs. In this paper we show how user-specified sequences and programs can be modeled using a finite state machine, termed an input-modeling finite state machines or IMFSM. Power estimation can be carried out using existing sequential circuit power estimation methods on a cascade circuit consisting of the IMFSM and the original sequential circuit.

DOI: 10.3233/ICA-1998-5207

Journal: Integrated Computer-Aided Engineering, vol. 5, no. 2, pp. 177-185, 1998