Network Flow Approach to Data Regeneration for Low Energy Embedded System Synthesis

Article type: Research Article

Authors: Gebotys, Catherine H.

Affiliations: Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada

Abstract: Optimizing energy during the synthesis of VLSI embedded systems for real-time-constrained applications is an important new problem. Memory has been shown to be a crucial component of the total system energy dissipation. This paper presents for the first time a network ow approach to minimizing the energy dissipation of memory components during systems synthesis. In particular, this new approach determines the optimal number of external and internal memory accesses and the number of extra computations (or data regeneration) for each task such that the total estimated energy dissipation of a task is minimized. This is unlike previous research which has only discussed ad-hoc suggestions for this problem. The network ow approach can be solved by a globally optimal solution in polynomial time using very fast and efficient algorithms. A large complex real industrial application, audio compression, donated by Motorola, is used to study the energy savings using different single and multichip system implementations along with voltage scaling. Results of synthesizing this complex application show that for some tasks, estimated energy savings range from 2 to 10 times. This contributes to 2.7 times improvement in the overall estimated energy dissipation of the embedded audio compression system, with no significant increase in cost or decrease in performance. This research is important for industry since consideration of energy dissipation at the early stages of design is crucial for mapping high performance applications into cost-efficient and reliable systems.

DOI: 10.3233/ICA-1998-5203

Journal: Integrated Computer-Aided Engineering, vol. 5, no. 2, pp. 117-128, 1998